The following figure shows an AND logic gate | vedclass

Name: Exam Paper Generator | JEE NEET Paper Generator | Vedclass
Brand: Vedclass
Rating: 5 (35 reviews)

Question

(A) For an $AND$ gate,the output $C$ is high $(1)$ only when both inputs $A$ and $B$ are high $(1)$.If either input is low $(0)$,the output $C$ is low

Vedclass · Accepted Answer

Vedclass · Answer

(A) For an $AND$ gate,the output $C$ is high $(1)$ only when both inputs $A$ and $B$ are high $(1)$.If either input is low $(0)$,the output $C$ is low $(0)$.Looking at the provided waveforms:- $A$ is high during the second and fourth time intervals.- $B$ is high during the second and third time intervals.- The output $C = A \cdot B$ will be high $(1)$ only during the second time interval where both $A$ and $B$ are high.- Therefore,the waveform for $C$ will show a high pulse only during the second interval.

The following figure shows an $AND$ logic gate circuit with two inputs $A$ and $B$ and the output $C$. The voltage waveforms of $C$ will be:

Similar Questions

If the output of $Y = A \cdot \bar B$ is $Y = 1$,then the inputs are:

To get an output $Y = 1$ from the logic circuit shown in the figure,the inputs can be:

The truth table given below is for which gate?
$A: 0, 0, 1, 1$
$B: 0, 1, 0, 1$
$C: 1, 1, 1, 0$

The truth table for the given logic circuit is

For the logic circuit shown in the figure,the Boolean expression is:

Vedclass Test Series

Exam Paper Generator

Online Exam Module