The diagram of a logic circuit is given below | vedclass

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(C) The circuit consists of two $OR$ gates followed by an $AND$ gate.$1$. The output of the upper $OR$ gate with inputs $W$ and $X$ is $(W + X)$.$2$.

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$W + (X.Y)$

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(C) The circuit consists of two $OR$ gates followed by an $AND$ gate.$1$. The output of the upper $OR$ gate with inputs $W$ and $X$ is $(W + X)$.$2$. The output of the lower $OR$ gate with inputs $W$ and $Y$ is $(W + Y)$.$3$. These two outputs are fed into an $AND$ gate,so the final output $F$ is:$F = (W + X) \cdot (W + Y)$$4$. Using Boolean algebra expansion:$F = W \cdot W + W \cdot Y + X \cdot W + X \cdot Y$$5$. Since $W \cdot W = W$:$F = W + W \cdot Y + X \cdot W + X \cdot Y$$6$. Factoring out $W$ from the first three terms:$F = W(1 + Y + X) + X \cdot Y$$7$. Since $(1 + Y + X) = 1$:$F = W \cdot 1 + X \cdot Y = W + X \cdot Y$

The diagram of a logic circuit is given below. The output $F$ of the circuit is represented by

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