From the circuit of the following logic gates | vedclass

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(D) Let the inputs be $A$ and $B$. The outputs of the two $NOT$ gates are $\overline{A}$ and $\overline{B}$.These are fed into a $NOR$ gate,so the out

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(D) Let the inputs be $A$ and $B$. The outputs of the two $NOT$ gates are $\overline{A}$ and $\overline{B}$.These are fed into a $NOR$ gate,so the output of the $NOR$ gate is $\overline{\overline{A} + \overline{B}}$.By De Morgan's theorem,$\overline{\overline{A} + \overline{B}} = \overline{\overline{A}} \cdot \overline{\overline{B}} = A \cdot B$.This output $(A \cdot B)$ and the input $B$ are fed into a $NAND$ gate.The final output $Y = \overline{(A \cdot B) \cdot B} = \overline{A \cdot (B \cdot B)}$.Since $B \cdot B = B$,we have $Y = \overline{A \cdot B}$.This is the Boolean expression for a $NAND$ gate. However,looking at the provided circuit image,the final gate is a $NAND$ gate,and the expression simplifies to $Y = \overline{A \cdot B}$,which is a $NAND$ gate.

From the circuit of the following logic gates,the basic logic gate obtained is

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