The truth table for the circuit given below i | vedclass

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Question

(B) The given circuit consists of two $AND$ gates,two $NOT$ gates,and one $OR$ gate. $1$. The upper $AND$ gate receives inputs $A$ and $\overline{B}$,

Vedclass · Accepted Answer

$A$$B$$Y$$0$$0$$0$$0$$1$$1$$1$$0$$1$$1$$1$$0$

Vedclass · Answer

(B) The given circuit consists of two $AND$ gates,two $NOT$ gates,and one $OR$ gate. $1$. The upper $AND$ gate receives inputs $A$ and $\overline{B}$,so its output is $A \cdot \overline{B}$. $2$. The lower $AND$ gate receives inputs $\overline{A}$ and $B$,so its output is $\overline{A} \cdot B$. $3$. The $OR$ gate combines these outputs to give the final output $Y = A \cdot \overline{B} + \overline{A} \cdot B$. $4$. This expression represents the $XOR$ (Exclusive $OR$) logic gate. $5$. The truth table for an $XOR$ gate is: | $A$ | $B$ | $Y$ | |---|---|---| | $0$ | $0$ | $0$ | | $0$ | $1$ | $1$ | | $1$ | $0$ | $1$ | | $1$ | $1$ | $0$ | Comparing this with the given options,option $B$ is correct.

The truth table for the circuit given below is $:$

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