The combination of NAND gates shown in the fi | vedclass

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(A) For the first circuit:The inputs $A$ and $B$ are passed through $NAND$ gates with shorted inputs,which act as $NOT$ gates. Thus,the inputs to the

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An $OR$ gate and an $AND$ gate respectively.

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(A) For the first circuit:The inputs $A$ and $B$ are passed through $NAND$ gates with shorted inputs,which act as $NOT$ gates. Thus,the inputs to the final $NAND$ gate are $\bar{A}$ and $\bar{B}$.The output $C = \overline{\bar{A} \cdot \bar{B}} = \overline{\bar{A}} + \overline{\bar{B}} = A + B$ (using De Morgan's theorem).This is equivalent to an $OR$ gate.For the second circuit:The inputs $A$ and $B$ are passed through a $NAND$ gate,giving an output of $\overline{A \cdot B}$. This is then passed through a $NAND$ gate with shorted inputs (acting as a $NOT$ gate).The output $C = \overline{\overline{A \cdot B}} = A \cdot B$.This is equivalent to an $AND$ gate.Therefore,the combinations are equivalent to an $OR$ gate and an $AND$ gate respectively.

The combination of $NAND$ gates shown in the figure is equivalent to:

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